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Wednesday, March 4 • 14:45 - 15:05
Disruptive Technology (2 minutes): “REX Neo Architecture: A Path to Exascale,” Paul Sebexen, REX Computing; Thomas Sohmers, REX Computing

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REX Computing is developing an energy efficient, high performance computing (HPC) architecture that aims to accelerate the arrival of exascale computing systems. The REX Neo architecture leverages the world’s first ultra-low-power HPC processor, as well as a system-level node design to deliver greater energy efficiency. Compared to the efficiency offered by existing systems, typically a maximum of 10 single precision GFLOPs per watt, the Neo architecture aims to achieve at least 100 GFLOPs per watt. Early prototypes of the REX Neo processor and compute node will be available for customer evaluation in 2016. 

The Neo architecture is a new approach to HPC that aims to overcome barriers of scaling existing systems by designing each component, from the processor chip to the node, with power efficiency in mind. Inspired by ideas in system design, from early systolic arrays to today’s commercially-available manycore platforms, and advances in compiler design and programming models, the guiding philosophy behind Neo centers on removing complexity from hardware in favor of performing optimizations ahead-of-time. Just as many pieces of complex software, including geospatial data processing applications, can often be reduced to compact reusable pieces of code, underneath the software, interconnects, and microarchitecture of Neo are simple compute cores. This structural isomorphism between workload demands and hardware design is the key to high scalability and particularly beneficial in simplifying the process of mapping parallel control and data flow into targeted executables. 


Wednesday March 4, 2015 14:45 - 15:05 CST
BioScience Research Collaborative 6500 Main Street, Houston, Tx 77005

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